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Quad DMOS Full Bridge PWM Motor Driver

A3988

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The A3988SJPTR-T & A3988SEVTR-T variants are in production but have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of these devices is currently restricted to existing customer applications. The devices should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available.
Date of status change: June 1, 2016.

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Description

Top Features

Packaging

The A3988 is a quad DMOS full-bridge driver capable of driving up to two stepper motors or four dc motors. Each full-bridge output is rated up to 1.2 A and 36 V. The A3988 includes fixed off-time pulse width modulation (PWM) current regulators, along with 2-bit nonlinear DACs (digital-to-analog converters) that allow stepper motors to be controlled in full, half, and quarter steps, and dc motors in forward, reverse, and coast modes. The PWM current regulator uses the Allegro patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation.

Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation.

Protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover current protection. Special power up sequencing is not required.

The A3988 is supplied in two packages, EV and JP, with exposed power tabs for enhanced thermal performance. The EV is a 6 mm × 6 mm, 36 pin QFN package with a nominal overall package height of 0.90 mm. The JP is a 7 mm × 7 mm 48 pin LQFP. Both packages are lead (Pb) free, with 100% matte tin leadframe plating.


  • 36 V output rating
  • 4 full bridges
  • Dual stepper motor driver
  • High current outputs
  • 3.3 and 5 V compatible logic supply
  • Synchronous rectification
  • Internal undervoltage lockout (UVLO)
  • Thermal shutdown circuitry
  • Crossover-current protection
  • Low profile QFN package

The A3988 is supplied in two packages, EV and JP, with exposed power tabs for enhanced thermal performance. The EV is a 6 mm × 6 mm, 36 pin QFN package with a nominal overall package height of 0.90 mm.

The JP is a 7 mm × 7 mm 48 pin LQFP.

Both packages are lead (Pb) free, with 100% matte tin leadframe plating.

 

 

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