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ACS710 Current Sensor IC Frequently-Asked Questions

The ACS710 current sensor family has the following advantages:
  • User-adjustable OC fault level 
  • High speed OC fault response (<2 µs) 
  • Wide bandwidth of 120 kHz 
  • Low noise, hence better current resolution 
  • Wide-body package provides greater creepage and clearance distances for line-powered applications 
  • Higher isolation voltage allows higher working voltage 
When mounted on the Allegro ASEK710 evaluation board (or any application board thermally similar to the ASEK710 evaluation board) the ACS710 package allows a maximum continuous current of 25 A at a maximum ambient temperature of 125°C. This sets the "optimized accuracy range," IPOA, for continuous input current. The "linear sensing range" is three times IPOA, and is appropriate for applications that monitor the inrush current or transient overcurrent, which are higher than the continuous current under normal operation. The ACS710 can linearly sense transient currents with amplitudes up to three times IPOA. (See also the FAQ "What does the characterization data look like at the sensor IC full linear sensing range, IR?") This feature is used in applications such as motor control, and power conversion and management.
Yes. Just connect the FAULT_EN pin to the /FAULT output pin (shown as A in figure 1), to achieve automatic Fault reset. This configuration makes the circuit function as a current comparator. (See the oscilloscope plot in figure 2 for the input and output signal waveforms.) A capacitor, COC, is recommended to avoid any possible glitches at the /FAULT pin. It should be of appropriate value, usually greater than 1 nF, dependent on the noise environment and the Fault response time required.
 
figure 1
Figure 1. Connection at A made to enable automatic reset of overcurrent fault.
 
 
figure 2 
Figure 2. Input (IP−) and output (FAULT_EN) signal waveforms 
of ACS710 configuration shown in figure 1 with COC = 100 nF.
Yes. The ACS710 family uses Hall-effect technology, which is capable of sensing electrical currents having both DC and AC components. As the datasheet states, the bandwidth of the ACS710 is 120 kHz typical. There may be phase lag and amplitude attenuation of the output for AC currents with frequency content greater than 120 kHz. For transient current signals, the response time is ≈ 4 µs.
This feature is particularly valuable when using the ACS710 with an analog-to-digital converter. A-to-D converters typically derive their LSB from a reference voltage input. If the reference voltage varies, the LSB will vary proportionally. The ratiometric feature of the ACS710 means its gain and offsets are proportional to its supply voltage, VCC. If the reference voltage and the supply voltage for the ACS710 are derived from the same source, the ACS710 and the A-to-D converter will both track those variations, and such variations will not be a source of error in the analog-to-digital conversion of the ACS710 output. Figure 3 is a plot of primary current, IP, vs output voltage, VOUT, of the ACS710-25C when varying VCC. The offset and sensitivity levels shift proportionally with VCC. For example, when VCC = 5.5 V, the 0 A output is 5.5 ⁄ 2 = 2.75 V nominal, and the sensitivity is 30.8 mV/A nominal.
 
figure 3 
Figure 3. ACS710-25C output voltage versus primary sensed current, at various supply voltage levels.
Allegro recommends the use of a 0.1 µF bypass capacitor between the VCC pin and the GND pin. The capacitor should be located as close as practicable to the ACS710 package body. Use of other external components depends on the application; please refer to Typical Application section of the datasheet.
No, the ACS710 sensitivity and 0-ampere quiescent voltage level are programmed by Allegro. 
The current resolution of the ACS710 family of sensor ICs is limited by the noise floor of the device output signal. For example, the ACS710-12C version can resolve a change in current level of about 163 mA, at 25°C, at full bandwidth. The ACS710-25C version can resolve approximately 213 mA. At these levels, the amount of magnetic field coupled into the linear Hall-effect IC is just above its noise floor. Resolution can be improved significantly by filtering the output of the ACS710 for applications requiring lower bandwidth. The noise level and device output current resolutions at various bandwidths, achievable through filtering, are given in table 1 for the ACS710-12C, and in table 2 for the ACS710-25C. Filtering was accomplished with a simple, first order RC filter consisting of the internal resistor RF(INT) (typical value 1.7 kΩ) and an external filter capacitor CF.

Table 1. ACS710-12C Noise Level and Current Resolution
versus Filtering Capacitance and Resulting Bandwidth

CF
(nF) 

BW
(kHz) 

VRMS Noise
(µV)

VP-P Noise
(µV)

Current Resolution
(mA)

0

120

1523

9138

163

1

94

1185

7110

127

2.2

43

1010

6060

108

4.7

20

874

5244

94

10

9

768

4608

82

22

4

724

4344

78

47

2

682

4092

73


Table 2. ACS710-25C Noise Level and Current Resolution
versus Filtering Capacitance and Bandwidth

CF
(nF) 

BW
(kHz) 

VRMS Noise
(µV)

VP-P Noise
(µV)

Current Resolution
(mA)

0

120

994

5964

213

1

94

948

5688

203

2.2

43

713

4278

153

4.7

20

658

3948

141

10

9

602

3612

129

22

4

570

3420

122

47

2

536

3216

115


Typical values for measured inductance versus test signal frequency are:
  • 3.1 nH at 10 kHz 
  • 2.8 nH at 100 kHz 
  • 2.5 nH at 200 kHz 
The capacitance between the ACS710 current carrying conductor and sensor ground is about 2 pF.
No, the ACS710 family is lead (Pb) free. All pins are plated with 100% matte tin, and there is no lead inside the package.
Yes, download from: ACS710 Gerber Files (ZIP).
Yes, a layout drawing .PDF file can be downloaded from: ACS710 Layout Drawing (PDF).
The clearance distance in an ACS710 application is typically equal to the distance between the solder pads on opposite sides of the sensor package. Based on the recommended solder pad layout in the datasheet, it measures approximately:
9.50 − 2 × ( 2.25 ⁄ 2 ) = 7.25 (mm).

The creepage distance on the surface of the sensor IC package measures approximately: 7.50 + 2.00 = 9.50 (mm)

The creepage distance on the surface of the printed circuit board on which the sensor IC is mounted may be increased, if necessary, by cutting a slit on the board between the solder pads on opposite sides of the sensor IC package. Refer to figure 4.

 figure 4

Figure 4. Typical slit cut into the PCB underneath the package, 
separating the two banks of pins, to further control creepage.
Assumptions:
 
     A. The current carrying conductor is on the same plane as the Hall element, and
     B. The conductor has an infinite length
 
The result based on above assumptions will be the worst case result in terms of the influence of the stray field generated by the current carrying conductor on the Hall element.
The magnetic field generated in the direction perpendicular to the plane in which the conductor and the Hall element lie, at the distance l to the conductor will be:
Β = µ × I ⁄ (2π × L)   (tesla)
 
Where:

     µ = µ0 = 4π × 10-7(H/m) = 400π(nH/m), assuming no core material around,

     I is in amperes, the current flowing in the conductor, and 

     L is in meters, the distance between the point under consideration and the conductor.

The analysis is based on the fact that the magnetic coupling coefficient of ACS710 family is typically 9.5 gauss per ampere (0.95 mT/A).

The graph in figure 5 shows absolute current error caused by a current carrying conductor which lies in the same plane as the Hall element, at various distances. The percentage error relative to full range and be calculated as:

Err = (absolute current error ⁄ IP) × 100    (%)


 figure 5

Figure 5. The absolute current error versus separation distance for various current values.

 

The ACS710 family has been certified by UL to the following standard:

UL1577 (Pending UL certificate)

The mold compound is UL recognized to UL94V-0
What is the behavior of the ACS710 output during a slow ramp-up of VCC?
The typical output behavior of the ACS710-12C during a slow ramp-up of VCC is shown for 0 A in figure 6 and for 12.5 A in figure 7.
figure 6
Figure 6. VCC ramp-up with IP = 0 A.


figure 7
Figure 7. VCC ramp-up with IP = 12.5 A.
The typical time to valid output is given in table 3 and in figure 8 (IP = 0 A, VCC = 5 V) and figure 9 (IP = 12.5 A, VCC = 5 V). However, we recommend a 3X to 5X safety margin to account for power-on time variation over process and temperature ranges.
 

Table 3. ACS710-12C Input Current versus Power-On Time

IP
(A)

tPO
(µs)

0

14

12.5

16

 
 figure 8
Figure 8. Startup of ACS710-12C with 0 A applied, then a VCC step from 0 to 5 V.


figure 9
Figure 9. Startup of ACS710-12C with 12.5 A applied, then a VCC step from 0 to 5 V.
The ACS710-25C VIOUT response time from deep saturation was measured at less than 9 µs. Please see the oscilloscope plot in figure 10 for details.
 

 figure 10

Figure 10. Test conditions: for saturation, VCC = 5 V, TA = 25°C,
IP = 180 A; for linear VIOUT, Ip = 40 A.
The graph in figure 11 shows the results of a high level frequency response simulation of the ACS710 current sensor IC circuit. The plot on the top is the amplitude response and the plot on the bottom is the phase response.
 
figure 11 
Figure 11. Frequency response of the ACS710.
The output of the sensor may oscillate.
The ACS710 may not produce an valid output, because the output driver will not be able to supply sufficient current.
The following overcurrent limit results are based on the Allegro ASEK710 evaluation board. The limits may be different on a different application board. For detailed information on the Allegro ASEK710 evaluation board, please see FAQ Can I get the Gerber files for your evaluation board?.
Table 4 presents results for continuous DC current, and table 5 presents results for pulsed current. Figure 12 shows the effects of various input current levels on die temperature.
 

Table 4. Continuous Current Overcurrent Limits
ASEK710 evaluation board, at various ambient temperatures

tA
(°C)

IP(OClim)
(A)

25

45

85

35

125

25

Table 5. Pulsed Current Overcurrent Limits
ASEK710 evaluation board, at room temperature

IP
(A)

Duration
(ms)

Duty Cycle
(%)

Quantity of
Pulses Allowed

100

3000

NA

Single

150

300

NA

Single

200

20

NA

Single

200

10

10

200

200

10

1

Unlimited 
 
 
 

 figure 12

Figure 12. ACS710 die temperature (°C) versus continuous DC IP current (A)
 
Please see the graphs in figure 13 for the distribution data from a group of ACS710-12C devices characterized for (13A) sensitivity, (13B) non-linearity, (13C) symmetry, and (13D) total error.
 
figure 13a 
 Figure 13A. ACS710-12C Sensitivity versus Ambient Temperature at IP = 37.5 A


              figure 13b 

Figure 13B. ACS710-12C Nonlinearity versus  Ambient Temperature at IP = 37.5 A


          figure 13c 
Figure 13C. ACS710-12C Symmetry versus Ambient Temperature at IP = 37.5 A


figure 13d

Figure 13D. ACS710-12C Total Error versus Ambient Temperature at IP = 37.5 A
The graph in figure 14 shows the distribution of the OC fault level error over a range of operating ambient temperatures. The data is taken from a limited number of devices and is for reference only. 
 
figure 14
Figure 14. ACS710-25C Overcurrent Fault Error versus Ambient Temperature
The leadframe noise rejection test is conducted by injecting a high-frequency sinusoidal frequency onto the high-current leads. The signal coupling onto the output of the Hall-effect device is then measured. The ACS710 family devices exhibit a high level of leadframe noise rejection as table 6 reveals. In addition, figure 15 indicates performance as a function of frequency.

Table 6. Typical Capacitive Coupling of
20 Vp-p Signal on the Sensed Current Path

Frequency
(MHz)

VOUT
(mVp-p)

Noise Rejection
(dB)

5

5

−72

10

16

−62

15

40

−54

20

58

−51 

 


figure 15
Figure 15. ACS710 noise rejection versus noise frequency