The following components are required for correct operation of the A3959:
RS, the external sense resistor, is required for the PWM current control circuit. This should be a noninductive type of resistor. Recommended maximum RS value can be calculated using RS = 0.5 / ITRIP(max). Using a reasonably smaller value for RS will dissipate less power in RS and provide headroom. There also needs to be a 0.1 µF mono/ceramic capacitor in parallel with the sense resistor.
A 0.22 µF mono/ceramic capacitor must be placed between the CP1 and CP2 pins.
The VREG pin should be decoupled with a 0.22 µF capacitor to ground.
A LOGIC SUPPLY (VDD) decoupling capacitor is recommended: ceramic, rated at 0.1 µF.
A LOAD SUPPLY (VBB) decoupling capacitor is recommended: electrolytic, rated at >47 µF. In addition, a 0.1 µF ceramic capacitor should be placed in parallel, if high frequency issues are a concern.
If the SLEEP pin is not used, a 1 kΩ pull-up resistor to VDD is required
Not necessarily. The inputs can be tied directly to VDD or ground, depending on the logic level you desire. If pull-up/pull-down resistors are required for your particular design, 1 k to 4.7 kΩ resistors are recommended.
50 V. This must not be exceeded under any circumstances.
The output current rating is for continuous current. The A3959 can handle a peak current of 6 A for <3 µs. Note: When running at high currents, power dissipation should be carefully considered. Caution should be taken to never exceed a junction temperature of 150°C when running the device.
The A3959 provides constant-current control. Motor winding current is controlled by an internal PWM current-control circuit, which incorporates an internal OSC circuit to set the fixed off-time, which is typically 24 µs.
Yes. The sense resistor, RS, should be connected as close as possible to the device. The ground side of RS should return on a separate trace to the ground pin(s) of the device. RS should be noninductive, and the circuit board traces should be as large as physically possible. A 47 µF or larger electrolytic decoupling capacitor should be placed between the load supply pins and ground, and be placed as close as physically possible to the device.
A ground plane area that is at least two times larger than the package outline is a good place to start. For further layout considerations, please refer to the following on the Allegro Web site: "Package Thermal Characteristics".
Use of external Schottky diodes with low VFORWARD, to clamp the outputs to VBB and ground, will help to reduce the power dissipation in the A3959. Heat sinks are also a possibility, but not as efficient.
There is no application note about using external diodes on the A3959. Each of the outputs should have one Schottky diode connected to VBB (cathode to VBB) and one Schottky diode connected to ground (anode to ground, not to the sense pins). If the PFD1 and PDF2 input pins are set to "slow decay only," then use only two Schottky diodes between the outputs and ground. The two Schottky diodes from the outputs to VBB will not help improve thermal performance in slow decay mode.
We typically don't recommend a specific diode, due to the range of voltages and currents that can be used.